High fanout net is a common bottleneck for timing closure. Therefore, in addition to the traditional method of reducing fanout, the net can also be introduced into the BUFG, provided that there is a BUFG available. As we all know, BUFG is a global clock resource that is used when configuring MMCM or PLL. Here, I will introduce you to two ways to save BUFG by using MMCM/PLL properly.
In most cases, MMCM is used as the Clock Network Deskew (Clock Network Deskew), as shown in the following figure. In this mode, merging the same-frequency clock as much as possible will be one of the effective ways to save BUFG. The same frequency clock may come from the same MMCM or from different MMCMs. The system needs to consider the clock phase relationship requirements when merging. In the figure below, endpoints 1, 4, and 6 are in phase, and 2, 3, and 5 are in phase.
Note: Image source ug572, figure 3-9
Another way to save BUFG is to work with MMCM in INTERNAL mode. As shown below. In this mode, the MMCM is purely used as a frequency synthesizer, and you don't need to care about the phase relationship between the MMCM output clock and the input clock. At this point, CLKFBOUT is directly connected to CLKFBIN, which saves one BUFG.
It is worth noting that when you use MMCM as INTERNAL mode, the Phase Alignment corresponding to IP Core is not checked, as shown in the figure below.
Ok, this is a very effective way to save BUFG and I wish the design a smooth one.
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