SD card interface design based on Nios II soft core processor (1)

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The Nios II developed by Altera is a 32-bit embedded processor soft core based on the System on a Programmable Chip (SOPC) technology. The Nios II soft core developed by Altera Corporation can be placed directly in the FPGA. It embodies the idea of ​​integrating the entire unit circuit of the product into a chip-on-chip SOPC within a chip. As a competitive technology, there are already a large number of products used in foreign countries. There are more and more developers using the Nios II processor for embedded system design in China, but there are still many applications. Distance should be more widely concerned. In this paper, the Nios II is needed to develop the storage system in the actual project. For the development of embedded system using Nios II, there is still a lot of work to be deeply studied. In the process of developing the storage system project, the FPGA-based system is completed. System hardware software design. In order to reach the design goals of the system, an in-depth study of the SOPC technology of the Nios II is required. Also need to transplant the uClinux operating system, based on the operating system SD card data read and write, it is necessary to involve how to write the driver. This article first briefly introduces the basic hardware circuit for operating the SD card, and then gives the basic process of SD card read and write operations and driver design. Finally, the conclusions of the full text are given. The method given in this paper has certain universality and practicability.

1 system hardware structure design

1.1 SD card

The Secure Digitgal Memory Card (Secure Digitgal Memory Card) is a joint venture developed by Panasonic Corporation, Toshiba Corporation, and SANDISK of the United States on the basis of MMC cards. It is a large-capacity, high-performance, A memory card with good security and simple access interface has been widely used. The range of applications includes: MP3, digital video cameras and camera products, consumer electronics such as smartphones. Many microprocessors currently integrate an interface circuit that communicates with an SD card.

1.2 Characteristics of the SD card

The shape and interface contacts of the SD card are shown in Figure 1. Dimensions are divided into two types: 24 mm * 32 mm * 2.1 mm or 24 mm * 32 mm * 1.4 mm.

Figure 1 SD card shape and interface

The interface circuit between the microprocessor and the SD card must conform to certain conventions. This is called the communication protocol in the read and write operations of the SD card. In order to adapt to different communication protocols, the SD card can be set to work in different communication modes. The communication mode of the SD card is divided into two types, one is the so-called SD mode, and the other is the SPI mode. The SPI communication mode is now being used more and more. In the communication process between the processor and the SD card, a processor (referred to as a host) that communicates with the SD card selects a communication method, but the communication mode cannot be changed throughout the communication. The SD card analyzes the reset command to determine what mode is used for the communication below, and the communication mode uses the same communication mode for the next time.

When operating in SD mode, the host uses the SD bus to access the SD card, using a multipoint bus topology. This structure includes a host and multiple slaves (here referred to as SD cards). All SD cards share a clock signal CLK, power and ground, and the command line and data line are dedicated to each SD card. As mentioned above, the current microprocessors are integrated with a hardware SPI interface, which is very convenient for operation between chips in the board. When the setting works in SPI mode, the host uses its own SPI bus to access the SD card. The microprocessor configures the communication mode to the SPI mode in the first reset command sent to the SD card. Of course, during the communication of the SD card, the communication mode cannot be changed to the SD mode.

1.3 SD card internal structure

2 is an internal structure diagram of the SD card, and the host controls the data in the storage unit inside the SD through the interface controller of the SD card. The purpose of this design is to isolate the internal memory of the SD card from the external operations, which is beneficial to protect internal data. On the other hand, it also facilitates the use of an updated process for the internal memory without affecting the external access interface.

When using a microprocessor to read and write data in an SD card, the communication protocol must be strictly followed. First, the basic unit of data transmission of the SD card is byte. However, the data is organized in blocks on the inside of the SD card. The data read operation for SD is essentially in blocks. The length of a block is typically a power of two, such as 256 bytes or 512 bytes. The length of the block (in bytes) in a particular data transfer can be set in the command control word before the data is transferred. As for the maximum length of the block allowed by the SD card, it can be determined by reading the register CSD of the SD card. There are control registers and status registers inside the SD card, and the four registers store configuration information. For example, the RCA register stores the address assigned by the host during the communication.

1.4 access to the SD card hardware circuit

The SD card is connected to the processor by means of the SPI bus. The circuit principle is shown in Figure 2.

Figure 2 SD card interface circuit diagram

1.5 NiosII build process

The first thing to consider is what Nios II is used. The Nios II is divided into several levels, with standard cores and high-speed cores. Because the system does not require high speed, the design uses the standard Nios II core. There is a good compromise between speed and resources. Build with Altera's SOPC Builder tool to generate a standard kernel for Nios II.