About the reasons for the failure of nor flash programming
This article is mainly about the introduction of nor flash programming, and focuses on the principle and application of nor flash programming in detail.
nor flashNor flash is one of the two main non-volatile flash memory technologies currently on the market. Intel first developed the NOR Flash technology in 1988, which completely changed the original EPROM (Erasable Programmable Read-Only-Memory) and EEPROM (Electrically Erasable Programmable Read-Only Memory). The situation that dominates the world. Then, in 1989, Toshiba announced the NAND Flash structure, emphasizing lower cost per bit, higher performance, and easy upgrade through the interface like a disk. The characteristic of NOR Flash is the execution in the chip (XIP, eXecute In Place), so that the application program can run directly in the Flash flash memory without reading the code into the system RAM. The transmission efficiency of NOR is very high, and it is very cost-effective in the small capacity of 1~4MB, but the very low writing and erasing speed greatly affects its performance. The structure of NAND can provide extremely high cell density, can reach high storage density, and the speed of writing and erasing is also very fast. The difficulty in applying NAND is that the management of Flash requires a special system interface. Generally, the reading speed of NOR is slightly faster than that of NAND, and the writing speed of NAND is much faster than NOR. These conditions should be considered in the design. ——"ARM Embedded Linux System Development From Entry to Proficiency", edited by Li Yafeng, Owensheng and others, Tsinghua University Press P52 Annotated API Key
Performance comparison
Flash flash memory is a non-volatile memory, which can erase and reprogram memory cell blocks called blocks. The write operation of any flash device can only be performed in empty or erased cells, so in most cases, the erase must be performed before the write operation. It is very simple for NAND devices to perform an erase operation, while NOR requires that all bits in the target block be written as 0 before erasing.
Since NOR devices are erased in blocks of 64-128KB, the time to perform a write/erase operation is 5s. On the contrary, erasing NAND devices is performed in blocks of 8-32KB, and perform the same The operation only takes 4ms at most.
The difference in block size when performing erase further widens the performance gap between NOR and NAND. Statistics show that for a given set of write operations (especially when updating small files), more erase operations must be performed Performed in NOR-based units. In this way, when choosing a storage solution, the designer must weigh the following factors.
l The read speed of NOR is slightly faster than that of NAND.
2. The writing speed of NAND is much faster than that of NOR.
3. NAND's 4ms erasing speed is much faster than NOR's 5s.
4. Most write operations need to be erased first.
5. The erasing unit of NAND is smaller, and the corresponding erasing circuit is less.
Detailed
NOR and NAND are the two main non-volatile flash memory technologies currently on the market. Intel first developed the NOR flash technology in 1988, which completely changed the original dominance of EPROM and EEPROM. Then, in 1989, Toshiba announced the NAND flash structure, emphasizing lower cost per bit, higher performance, and can be easily upgraded through an interface like a disk. But after more than ten years, there are still quite a few hardware engineers who can't distinguish between NOR and NAND flash memory.
Like "flash memory" can often be used interchangeably with the phase "NOR memory". Many people in the industry are also confused about the advantages of NAND flash memory technology over NOR technology, because in most cases flash memory is only used to store a small amount of code, NOR flash memory is more suitable at this time. And NAND is an ideal solution for high data storage density.
The characteristic of NOR is the execution on the chip (XIP, eXecute In Place), so that the application program can be run directly in the flash memory without reading the code into the system RAM. The transmission efficiency of NOR is very high, and it is very cost-effective in the small capacity of 1 to 4MB, but the very low writing and erasing speed greatly affects its performance.
NAND structure can provide extremely high cell density, can reach high storage density, and the speed of writing and erasing is also very fast. The difficulty of applying NAND is that the management of flash requires a special system interface.
Interface difference
NOR flash has an SRAM interface, there are enough address pins to address, you can easily access every byte inside.
NAND devices use complex I/O ports to serially access data, and the methods of each product or manufacturer may vary. 8 pins are used to transmit control, address and data information.
NAND read and write operations use 512-byte blocks, which is a bit like a hard disk to manage such operations. Naturally, NAND-based memory can replace hard disks or other block devices.
Capacity cost
The cell size of NAND flash is almost half of that of NOR devices. Due to the simpler production process, the NAND structure can provide higher capacity within a given mold size, which reduces the price accordingly.
NOR flash occupies most of the flash memory market with a capacity of 1 to 16MB, while NAND flash is only used in products with a capacity of 8 to 128MB. This also shows that NOR is mainly used in code storage media, NAND is suitable for data storage, and NAND is used in CompactFlash, Secure Digital, PC Cards and MMC (Multi Media Card) have the largest market share in the memory card market.
Reliable and durable
One important consideration when using flash media is reliability. For systems that need to expand MTBF (Mean Time Between Failures), Flash is a very suitable storage solution. The reliability of NOR and NAND can be compared in terms of life (endurance), bit swapping, and bad block handling.
Life (durability)
In NAND flash memory, the maximum number of erasing and writing of each block is one million, while the number of erasing and writing of NOR is 100,000. In addition to NAND memory having the advantage of a block erase cycle of 10 to 1, the typical NAND block size is one-eighth of the NOR device, and each NAND memory block has fewer deletes in a given time.
Bit swap
All flash devices suffer from bit swapping. In some cases (rarely, NAND occurs more often than NOR), a bit will be inverted or reported to be inverted.
A bit change may not be obvious, but if it happens to a critical file, this small failure may cause the system to shut down. If you just report a problem, read it a few more times and it may solve it.
Of course, if this bit is really changed, an error detection/error correction (EDC/ECC) algorithm must be used. The problem of bit inversion is more common in NAND flash memory. When NAND flash memory is used, NAND suppliers recommend using EDC/ECC algorithms at the same time.
This problem is not fatal when using NAND to store multimedia information. Of course, if local storage devices are used to store operating systems, configuration files or other sensitive information, EDC/ECC systems must be used to ensure reliability.
About the reasons for the failure of nor flash programmingRecently, I was watching the instructional video of National Embedded Technology. In the first episode of National Embedded Experience Introductory Class-2-1 (development board system installation-Jlink method), I directly burned nor flash without any configuration method. The success was purely accidental! There were also two errors when programming in the video.
My development board is mini2440, if it is of other types, you can also refer to it according to the specific situation.
One, solution one
1. Search for S3C2440 JLink configuration file download on the Internet.
2. Click file -> open project and select the downloaded initialization project file.
3. Click option -> project settings to select Flash, and click select flash device. Select the nor flash chip model corresponding to the development board, my board must be SST39VF1601, here I choose SST39VF1601. For details, refer to the user manual to find the Nor Flash chip model.
After setting the above, the following programming work can be carried out, and the programming is successful once in this way.
Two, solution two
1. Select Options -" Project Settings -" CPU -"'Use following init sequence:', there is only one line by default:
0 reset 0 0ms reset and Halt target
Then select the row, click Edit, modify the Delay to 2ms, and confirm.
Three, solution three
1. Click options--"project settings--"CPU, select Action in Use following init sequence, and change Reset to Halt.
But it is recommended that you use the first option.
NOR Flash programming principleWhen writing to FLASH, each BIT can be changed from 1 to 0 by programming, but it cannot be changed from 0 to 1. In order to ensure the correctness of the write operation, an erase operation must be performed before the write operation. The erase operation will change the value of a SECTOR of FLASH, a BANK or the entire FLASH to 0xFF. When writing, pay attention to the boundary issues of each page, sector, and block.
Flash read and write operation flow (W25Q64 as an example);
1: Define an array (global variable), the size of which is the smallest erase cache, which is used to back up the data in the area to be erased:;
u8 SPI_FLASH_BUF [4096].
2: Define 3 variables to save the sector number, sector offset address, and sector remaining address;
secpos=WriteAddr/4096;
secoff=WriteAddr%4096;
secremain=4096-secoff;//Remaining address
3: Determine the size of the data capacity to be written to the Flash. The data capacity is less than the number of remaining addresses, which means that all data can be written to the Flash without sector boundary problems; if the number of addresses exceeds the number of addresses, a mark should be made at the boundary of the data capacity. .
if (NumByteToWrite《=secremain)secremain=NumByteToWrite;//Judgment
4: Read out all the data to be written into that sector and put it in the cache.
5: From the sector offset address, check whether the old data stored in the sector to be written is all 1, if not, erase the entire sector to make it all 1.
6: With the sector boundary as the limit, the data to be written is stored in the buffer area from the sector offset address.
7: Write all the data in the buffer area into the sector (when writing, the problem of the page boundary must be judged, and the idea is similar to that of writing the sector).
8: Judge whether all the data is written, (if the data capacity to be written exceeds the remaining address, add 1 to the sector number; clear the offset address; subtract the previous remaining address from the data capacity; modify the address of the data capacity, change The data that has been written is filtered out; modify the address that will be written to the storage unit)
9: Return to step 4.
ConclusionThis is the end of the related introduction about nor flash programming. If there are any deficiencies, please correct me.
Related reading recommendations: Detailed explanation of the difference between NAND flash and NOR flash
Related reading recommendations: a detailed analysis of the difference between NorFlash and NandFlash
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